DESIGN ENGINEER

As a design engineer on our Design team, you will have the opportunity to work with one of our product divisions to develop our next generation of best-in-class silicon products. Opportunities exist in the areas of circuits, high-level logic, and mixed-signal devices.

Circuit Designer: As a circuit-level designer, you may have the opportunity to participate in any of the following: Specification, Design, Schematic Capture, and Layout of CMOS circuits, simulation with Spice and behavioral mixed-signal simulators, development of analog and mixed-signal IP chip development with industry-leading CAD tools

Logic Designer: As a logic designer you may have the opportunity to participate in any of the following: design of high-level logic functions using Verilog, use of Design Compiler to implement those functions, solving timing, power, and speed issues with industry-leading CAD tools.

Mixed-Signal Designer: As part of the Mixed-Signal Development and Verification team, you will learn mixed-signal verification flow and contribute to the development of Cypress’ leading-edge mixed signal products. And, as part of the Design Team, you will contribute to and be responsible for implementation and verification of key DFT logic modules. You will also contribute in various tasks spanning the entire design process.

Save Category as RSS Feed
Search results for "". Page 1 of 2, Results 1 to 25
Title Location Date Sort ascending
Reset
Dir Design Engrg
Dir Design Engrg Shanghai, 31, CN Jan 26, 2019
Shanghai, 31, CN Jan 26, 2019
Sr Staff Elect Design Engr
Sr Staff Elect Design Engr San Jose, CA, US Jan 28, 2019
San Jose, CA, US Jan 28, 2019
Sr Elect Design Engr
Sr Elect Design Engr Cork, C, IE Jan 28, 2019
Cork, C, IE Jan 28, 2019
Prin Elect Design Engr
Prin Elect Design Engr Bangalore, KA, IN Jan 30, 2019
Bangalore, KA, IN Jan 30, 2019
Prin ASIC Design Engr
Prin ASIC Design Engr Tel Aviv, TA, IL Jan 31, 2019
Tel Aviv, TA, IL Jan 31, 2019
Sr MTS Elect Design Engr
Sr MTS Elect Design Engr San Jose, CA, US Jan 31, 2019
San Jose, CA, US Jan 31, 2019
Sr Staff Elect Design Engr
Sr Staff Elect Design Engr Bangalore, KA, IN Feb 1, 2019
Bangalore, KA, IN Feb 1, 2019
Sr Elect Design Engr
Sr Elect Design Engr Bangalore, KA, IN Feb 1, 2019
Bangalore, KA, IN Feb 1, 2019
Physical Design Engineer - New College Graduate Austin, TX, US Feb 3, 2019
Elect Design Engr
Elect Design Engr Cork, C, IE Feb 4, 2019
Cork, C, IE Feb 4, 2019
Sr Staff Elect Design Engr
Sr Staff Elect Design Engr Cork, C, IE Feb 4, 2019
Cork, C, IE Feb 4, 2019
Elect Design Engr
Elect Design Engr Cork, C, IE Feb 4, 2019
Cork, C, IE Feb 4, 2019
Sr Staff Elect Design Engr (RTL, Subsystem, ARM, Frontend) Bengaluru, KA, IN Feb 5, 2019
Sr MTS Elect Design Engr (Architect, ARM, Subsystem, RTL) Bangalore, KA, IN Feb 5, 2019
Staff Verification Engineer
Staff Verification Engineer Lynnwood, WA, US Feb 7, 2019
Lynnwood, WA, US Feb 7, 2019
Sr Staff Elect Design Engr
Sr Staff Elect Design Engr Lynwood, WA, US Feb 7, 2019
Lynwood, WA, US Feb 7, 2019
Prin Systems Engr 1 1
Prin Systems Engr 1 1 Taipei, TPQ, TW Feb 7, 2019
Taipei, TPQ, TW Feb 7, 2019
Prin Systems Engr
Prin Systems Engr Taipei, TPE, TW Feb 7, 2019
Taipei, TPE, TW Feb 7, 2019
Mgr Design Engrg
Mgr Design Engrg Martinsried, BY, DE Feb 8, 2019
Martinsried, BY, DE Feb 8, 2019
Staff Verification Engr
Staff Verification Engr San Jose, CA, US Feb 8, 2019
San Jose, CA, US Feb 8, 2019
Sr Staff Verification Engr
Sr Staff Verification Engr San Jose, CA, US Feb 8, 2019
San Jose, CA, US Feb 8, 2019
Staff RTL Design Engr
Staff RTL Design Engr San Jose, CA, US Feb 8, 2019
San Jose, CA, US Feb 8, 2019
Prin RTL Design Engr
Prin RTL Design Engr San Jose, CA, US Feb 8, 2019
San Jose, CA, US Feb 8, 2019
Prin RTL Design Engr
Prin RTL Design Engr San Jose, CA, US Feb 8, 2019
San Jose, CA, US Feb 8, 2019
Staff Analog Design Engr
Staff Analog Design Engr San Jose, CA, US Feb 8, 2019
San Jose, CA, US Feb 8, 2019