DESIGN ENGINEER

As a design engineer on our Design team, you will have the opportunity to work with one of our product divisions to develop our next generation of best-in-class silicon products. Opportunities exist in the areas of circuits, high-level logic, and mixed-signal devices.

Circuit Designer: As a circuit-level designer, you may have the opportunity to participate in any of the following: Specification, Design, Schematic Capture, and Layout of CMOS circuits, simulation with Spice and behavioral mixed-signal simulators, development of analog and mixed-signal IP chip development with industry-leading CAD tools

Logic Designer: As a logic designer you may have the opportunity to participate in any of the following: design of high-level logic functions using Verilog, use of Design Compiler to implement those functions, solving timing, power, and speed issues with industry-leading CAD tools.

Mixed-Signal Designer: As part of the Mixed-Signal Development and Verification team, you will learn mixed-signal verification flow and contribute to the development of Cypress’ leading-edge mixed signal products. And, as part of the Design Team, you will contribute to and be responsible for implementation and verification of key DFT logic modules. You will also contribute in various tasks spanning the entire design process.

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EDA CAD Design Engineer (PNR, Backend, Physical Design, Floorplan, STA, Synthesis) Bangalore, KA, IN Jul 24, 2019
Sr Elect Design Engr
Sr Elect Design Engr Bangalore, KA, IN Jul 24, 2019
Bangalore, KA, IN Jul 24, 2019
Sr Elect Design Engr
Sr Elect Design Engr Bangalore, KA, IN Jul 24, 2019
Bangalore, KA, IN Jul 24, 2019
Sr Elect Design Engr
Sr Elect Design Engr Bangalore, KA, IN Jul 25, 2019
Bangalore, KA, IN Jul 25, 2019
SoC Power Integrity Architect for MCU, IoT, and Automotive San Jose, CA, US Jul 26, 2019
Verification Engineer
Verification Engineer Dublin, L, IE Jul 27, 2019
Dublin, L, IE Jul 27, 2019
Elect Design Engr
Elect Design Engr Cork, C, IE Jul 28, 2019
Cork, C, IE Jul 28, 2019
Elect Design Engr
Elect Design Engr Cork, C, IE Jul 28, 2019
Cork, C, IE Jul 28, 2019
Sr Systems Engr
Sr Systems Engr Bangalore, KA, IN Jul 29, 2019
Bangalore, KA, IN Jul 29, 2019
Sr Prin Elect Design Engr
Sr Prin Elect Design Engr San Jose, CA, US Jul 29, 2019
San Jose, CA, US Jul 29, 2019
Prin System Validation Engr
Prin System Validation Engr Bangalore, KA, IN Jul 30, 2019
Bangalore, KA, IN Jul 30, 2019
Sr Staff Elect Design Engr
Sr Staff Elect Design Engr Nagoya-shi, 23, JP Jul 31, 2019
Nagoya-shi, 23, JP Jul 31, 2019
Prin RTL Design Engr
Prin RTL Design Engr San Jose, CA, US Aug 1, 2019
San Jose, CA, US Aug 1, 2019
Prin RTL Design Engr
Prin RTL Design Engr San Jose, CA, US Aug 1, 2019
San Jose, CA, US Aug 1, 2019
Staff Analog Design Engr
Staff Analog Design Engr San Jose, CA, US Aug 1, 2019
San Jose, CA, US Aug 1, 2019
Sr Circuit Design Engr
Sr Circuit Design Engr San Jose, CA, US Aug 1, 2019
San Jose, CA, US Aug 1, 2019
Sr Staff Systems Engr
Sr Staff Systems Engr Hsinchui, HSQ, TW Aug 3, 2019
Hsinchui, HSQ, TW Aug 3, 2019
Prin Elect Design Engr
Prin Elect Design Engr San Jose, CA, US Aug 3, 2019
San Jose, CA, US Aug 3, 2019
Sr Staff Elect Design Engr
Sr Staff Elect Design Engr Bangalore, KA, IN Aug 6, 2019
Bangalore, KA, IN Aug 6, 2019
Electronic Design Engr
Electronic Design Engr Dublin, L, IE Aug 6, 2019
Dublin, L, IE Aug 6, 2019
Sr Elect Design Engr
Sr Elect Design Engr Langen, HE, DE Aug 7, 2019
Langen, HE, DE Aug 7, 2019
Sr Elect Design Engr
Sr Elect Design Engr Martinsried - Munich, BY, DE Aug 7, 2019
Martinsried - Munich, BY, DE Aug 7, 2019
Sr Staff Elect Design Engr
Sr Staff Elect Design Engr Martinsried - Munich, BY, DE Aug 7, 2019
Martinsried - Munich, BY, DE Aug 7, 2019
Sr Staff Elect Design Engr
Sr Staff Elect Design Engr Martinsried - Munich, BY, DE Aug 7, 2019
Martinsried - Munich, BY, DE Aug 7, 2019
Sr Staff Elect Design Engr
Sr Staff Elect Design Engr Martinsried - Munich, BY, DE Aug 7, 2019
Martinsried - Munich, BY, DE Aug 7, 2019