DESIGN ENGINEER

As a design engineer on our Design team, you will have the opportunity to work with one of our product divisions to develop our next generation of best-in-class silicon products. Opportunities exist in the areas of circuits, high-level logic, and mixed-signal devices.

Circuit Designer: As a circuit-level designer, you may have the opportunity to participate in any of the following: Specification, Design, Schematic Capture, and Layout of CMOS circuits, simulation with Spice and behavioral mixed-signal simulators, development of analog and mixed-signal IP chip development with industry-leading CAD tools

Logic Designer: As a logic designer you may have the opportunity to participate in any of the following: design of high-level logic functions using Verilog, use of Design Compiler to implement those functions, solving timing, power, and speed issues with industry-leading CAD tools.

Mixed-Signal Designer: As part of the Mixed-Signal Development and Verification team, you will learn mixed-signal verification flow and contribute to the development of Cypress’ leading-edge mixed signal products. And, as part of the Design Team, you will contribute to and be responsible for implementation and verification of key DFT logic modules. You will also contribute in various tasks spanning the entire design process.

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Verification Engineer
Verification Engineer Dublin, L, IE Oct 4, 2019
Dublin, L, IE Oct 4, 2019
Verification Design Engr
Verification Design Engr Netanya, TA, IL Oct 11, 2019
Netanya, TA, IL Oct 11, 2019
Synthesis/STA Physical Design Engineer - Greater Seattle Area Lynwood, WA, US Oct 11, 2019
Synthesis/STA Physical Design Engineer - Greater Seattle Area Lynwood, WA, US Oct 11, 2019
Staff Systems Engr
Staff Systems Engr Bangalore, KA, IN Sep 25, 2019
Bangalore, KA, IN Sep 25, 2019
Staff Elect Design Engr
Staff Elect Design Engr Kawasaki, 14, JP Oct 6, 2019
Kawasaki, 14, JP Oct 6, 2019
Staff Elect Design Engr
Staff Elect Design Engr Austin, TX, US Oct 11, 2019
Austin, TX, US Oct 11, 2019
Staff Elect Design Engr
Staff Elect Design Engr Lynwood, WA, US Oct 11, 2019
Lynwood, WA, US Oct 11, 2019
Staff Elect Design Engr
Staff Elect Design Engr Lynnwood, WA, US Oct 11, 2019
Lynnwood, WA, US Oct 11, 2019
Staff Elect Design Engr
Staff Elect Design Engr Bangalore, KA, IN Oct 8, 2019
Bangalore, KA, IN Oct 8, 2019
Staff Design Verification Engr
Staff Design Verification Engr Bangalore, KA, IN Sep 28, 2019
Bangalore, KA, IN Sep 28, 2019
Sr Systems Engr
Sr Systems Engr San Jose, CA, US Oct 4, 2019
San Jose, CA, US Oct 4, 2019
Sr Staff Elect Design Engr 1
Sr Staff Elect Design Engr 1 Dublin, D, IE Sep 23, 2019
Dublin, D, IE Sep 23, 2019
Sr Staff Elect Design Engr
Sr Staff Elect Design Engr Bangalore, KA, IN Oct 3, 2019
Bangalore, KA, IN Oct 3, 2019
Sr Staff Elect Design Engr
Sr Staff Elect Design Engr Martinsried - Munich, BY, DE Oct 4, 2019
Martinsried - Munich, BY, DE Oct 4, 2019
Sr Staff Elect Design Engr
Sr Staff Elect Design Engr Martinsried - Munich, BY, DE Oct 4, 2019
Martinsried - Munich, BY, DE Oct 4, 2019
Sr Staff Elect Design Engr
Sr Staff Elect Design Engr Bangalore, KA, IN Oct 6, 2019
Bangalore, KA, IN Oct 6, 2019
Sr Staff Elect Design Engr
Sr Staff Elect Design Engr Martinsried - Munich, BY, DE Oct 4, 2019
Martinsried - Munich, BY, DE Oct 4, 2019
Sr Staff Elect Design Engr
Sr Staff Elect Design Engr Martinsried - Munich, BY, DE Oct 4, 2019
Martinsried - Munich, BY, DE Oct 4, 2019
Sr Staff Elect Design Engr
Sr Staff Elect Design Engr Martinsried - Munich, BY, DE Oct 4, 2019
Martinsried - Munich, BY, DE Oct 4, 2019
Sr Staff Elect Design Engr
Sr Staff Elect Design Engr Shanghai, 31, CN Oct 10, 2019
Shanghai, 31, CN Oct 10, 2019
Sr Staff Elect Design Engr
Sr Staff Elect Design Engr Bangalore, KA, IN Oct 11, 2019
Bangalore, KA, IN Oct 11, 2019
Sr Staff Elect Design Engr
Sr Staff Elect Design Engr Cork, C, IE Oct 11, 2019
Cork, C, IE Oct 11, 2019
Sr Staff Elect Design Engr
Sr Staff Elect Design Engr Cork, C, IE Oct 11, 2019
Cork, C, IE Oct 11, 2019
Sr Staff Elect Design Engr
Sr Staff Elect Design Engr Dublin, D, IE Oct 11, 2019
Dublin, D, IE Oct 11, 2019