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Prin Physical Design Engr

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Date: Feb 9, 2019

Location: Bangalore, KA, IN

Company: Cypress Semiconductor Corporation

Job ID

Requisition Id:- 16884

Job Description

Job Description

  • This position is for Physical Design and Timing Closure of complex, low power SoCs
  • Candidate will work on various stages of physical design implementation which includes floor-planning, power grid design, place and route, clock tree synthesis, timing closure, physical verification checks.
  • Candidate is expected to have understood of low power design techniques.
  • Candidate will be responsible to achieve die area, performance, power goals for blocks/top.

Skills

Skills

  • B.E./B.Tech, M.E./MTech. with 10 to 15 years of experience and specialization in VLSI design
  • Hands-on experience in physical design and timing closure of large blocks
  • Experience of industry standard tools for physical design and signoff
  • Experience in scripting languages (shell, perl, tcl) and Make flow
  • Understanding of 40nm/28nm technologies and associated physical design challenges
  • Must be a good team player and should have desire to learn and explore
  • Experience: 10 to 15 Years

Note

Cypress is an Equal Employment Opportunity/Affirmative Action employer and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, genetic information, national origin, physical or mental disability, or status as a Protected Veteran.

 

 

TO ALL RECRUITMENT AGENCIES:

Cypress Semiconductor does not accept unsolicited agency resumes. Please do not forward resumes to our jobs alias, Cypress Semiconductors employees or any other company location. Cypress Semiconductor is not responsible for any fees related to unsolicited resumes.

 

 


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