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Sr Elect Design Engr 1

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Date: Jul 1, 2019

Location: Bangalore, KA, IN

Company: Cypress Semiconductor Corporation

Job ID

Requisition Id:- 16877

Job Description

Functional Verification of Desgin IP blocks and SOC 

Execute test plan for logic simulation at IP and chip level with little support from the team

Test/Coverage coding 

Debug digital design and testbenches

manage and report regression to the team




Strongs fundementals in digital design and logic

Good problem solving skills.

Exposure to scripting and Linux environments

Knowledge of programming in C/C++

Verilog/System verilog  languages are desirable

Degree & Discipline: ME, MICROELECTRONICS & EMBEDDED SYSTEMS / B.E, Electronics & Communications

Experience in Industry: 0.5-2 years.


Cypress is an Equal Employment Opportunity/Affirmative Action employer and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, genetic information, national origin, physical or mental disability, or status as a Protected Veteran.



Cypress Semiconductor does not accept unsolicited agency resumes. Please do not forward resumes to our jobs alias, Cypress Semiconductors employees or any other company location. Cypress Semiconductor is not responsible for any fees related to unsolicited resumes.

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