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Sr Elect Design Engr

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Date: Dec 1, 2018

Location: Bangalore, KA, IN

Company: Cypress Semiconductor Corporation

Job ID

Requisition Id:- 14148

Job Description

Cypress is a leading supplier of programmable system-on-a-chip (PSoC) products and this position is for digital verification team. The candidate will use state of the art tools and methodologies to verify leading edge products at the block, subsystem, and full chip level. The candidate will also participate in ongoing initiatives to improve and update our methodology. Day to day work will include understanding functionality of the SOC and the various sub-systems, developing test requirement and verification architecture documents, automation scripts, developing test bench and test cases using System Verilog & OVM methodology, verify design using constraint random testing and work with design / Physical design teams to get closure on defects.  Candidate will work on multiple areas of verification – RTL verification, Power Aware verification, Gate level simulations and Test vector generation.

Skills

Good Knowledge of verification of SOC’s both at block level and at full chip level. Experience in developing test plans, test benches and test cases for complex SOCs and modules. Experience with RTL simulation, Gate level simulation and vector generation. Exposure to advanced verification methods using SV and OVM/VMM. 

Note

Cypress is an Equal Employment Opportunity/Affirmative Action employer and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, genetic information, national origin, physical or mental disability, or status as a Protected Veteran.



TO ALL RECRUITMENT AGENCIES:

Cypress Semiconductor does not accept unsolicited agency resumes. Please do not forward resumes to our jobs alias, Cypress Semiconductors employees or any other company location. Cypress Semiconductor is not responsible for any fees related to unsolicited resumes.


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