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Elect Design Engr

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Date: May 26, 2019

Location: Dublin, D, IE

Company: Cypress Semiconductor Corporation

Job ID

Requisition Id:- 15105

Job Description

Essential Responsibilities

  • Responsible for the design & verification of capacitive sensing IP
  • Full design flow (RTL, Synthesis, STA)
  • Full verification flow (Functional, PA, Formal)

Skills

Skills

  • Good understand of logic design fundamentals
  •  Object Orientated Programming experience (C++, Java etc)
  •  Understanding of Verilog or VHDL

 

Qualifications and Education Requirements

  • Degree in Electronics or Software Engineering

Note

Cypress is an Equal Employment Opportunity/Affirmative Action employer and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, genetic information, national origin, physical or mental disability, or status as a Protected Veteran.



TO ALL RECRUITMENT AGENCIES:

Cypress Semiconductor does not accept unsolicited agency resumes. Please do not forward resumes to our jobs alias, Cypress Semiconductors employees or any other company location. Cypress Semiconductor is not responsible for any fees related to unsolicited resumes.


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