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Sr. Packaging SI Engineer (Signal Integrity)

Date: Nov 14, 2018

Location: Penang, 07, MY

Company: Cypress Semiconductor Corporation

Job ID

Requisition Id:- 11493

Job Description

Sr. Packaging SI Engineer (Signal Integrity)
1) Responsible to drive design optimization & SI (Signal Integrity) justification for new package design.
2) Perform SI analysis (RLGC, Impedance Plot, Timing-analysis, Noise Analysis and etc.) using EDA simulation tool for various packages including Lead-frame, BGA, WLCSP, LLC and etc.
3) Package characterization and measurement in Cypress SI lab including pin capacitance, TDR measurement and IBIS validation.
4) Generate IBIS model of NPI for customer simulation used.


1) Knowledge in transmission line theory and electromagnetic field theory.
2) Experienced in using AutoCAD/ Cadence APD including Sigrity Si tools. Experience in field solvers such as HFSS, Q3D or similar
3) Understanding in lab equipment such as Oscilloscope, SMU, LCR meter, TDR etc. and able to perform scripting to aid in data processing

4) Understanding of PCB and package design as it relates to signal integrity. This should include wafer level CSP, BGA and lead frame packages.


Cypress is an Equal Employment Opportunity/Affirmative Action employer and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, genetic information, national origin, physical or mental disability, or status as a Protected Veteran.


Cypress Semiconductor does not accept unsolicited agency resumes. Please do not forward resumes to our jobs alias, Cypress Semiconductors employees or any other company location. Cypress Semiconductor is not responsible for any fees related to unsolicited resumes.

Job Segment: Package Design, Engineer, Manufacturing Engineer, Drafting, CAD, Manufacturing, Engineering

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