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Prin RTL Design Engr

Date: Aug 1, 2019

Location: San Jose, CA, US

Company: Cypress Semiconductor Corporation

Job ID

Requisition Id:- 16980

Job Description

Responsibilities include:

  • Participate in architecture definition and modeling.
  • Contribute to micro-architecture specification and reviews.
  • Review industry standard specs and ensure IPs are kept up to date for compliance.
  • Define design partitioning for efficient IP/sub-system/full chip implementation
  • Review and provide feedback on verification plans and methodology.
  • Drive block/chip/system level development and execution.
  • Work with Hard IP designers, verification, validation, Firmware engineers and architects to produce thoroughly verified, robust IP
  • Actively participate in post-silicon bring-up, validation and compliance testing.

Principal RTL Design Engineer must have following skills:

  • Proven track record of taking several chips in from product definition to production.
  • Experience in complex ASIC design.
  • Good understanding of ASIC design and verification methodologies and flows.
  • Excellent understanding of standard ASIC design techniques, including:
    • Architecture/Micro-architecture definition
    • Design partitioning and Hard IP interactions
    • Multiple async clock domain designs
    • Design for test
    • Clock/Reset
    • Power aware
  • Excellent understanding of:
    • Synthesis
    • STA
    • CDC
    • Lint
    • LEC
  • Good problem-solving skills.
  • Work effectively with both internal and external teams/customers is expected.
  • Experience with silicon debug which include logic and custom Analog Blocks working together.
  • Strong written and verbal communication skills.
  • Facilitator of direct and open communication, diversity of opinion, and debate.
  • Self-motivated with the initiative to seek constant improvements in the design methodologies.
  • The candidate must also possess strong initiative, analytical/problem solving skills, team working skills, ability to multitask and be able to work within a diverse team environment.
  • Expertise in dealing and designing with complex IP's from different sources onto the same piece of silicon.
  • Expertise in USB/PCIe/micro-controller space is a plus
  • 10 – 15 years of experience.

Cypress is an Equal Employment Opportunity employer and does not discriminate in recruiting, hiring, training or promoting, on the basis of race, ethnicity, color, creed, religion, sex, sexual orientation, gender, gender identity, genetic information, national origin, physical or mental disability, pregnancy, medical condition, U.S. military or protected veteran status, union membership, or political affiliation.


Cypress Semiconductor does not accept unsolicited agency resumes. Please do not forward resumes to our jobs alias, Cypress Semiconductors employees or any other company location. Cypress Semiconductor is not responsible for any fees related to unsolicited resumes.

Nearest Major Market: San Jose
Nearest Secondary Market: Palo Alto

Job Segment: Firmware, Design Engineer, Technology, Engineering

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